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19-1846; Rev 1; 6/01
+3V/+5V, Serial-Input, Voltage-Output, 16-Bit DACs
General Description
The MAX5441-MAX5444 are serial-input, voltage-output, 16-bit digital-to-analog converters (DACs) in tiny MAX packages, 50% smaller than comparable DACs in 8-pin SOs. They operate from low +3V (MAX5443/ MAX5444) or +5V (MAX5441/MAX5442) single supplies. They provide 16-bit performance (2LSB INL and 1LSB DNL) over temperature without any adjustments. Unbuffered DAC outputs result in a low supply current of 120A and a low offset error of 2LSB. The DAC output ranges from 0 to VREF. For bipolar operation, matched scaling resistors are provided in the MAX5442/MAX5444 for use with an external precision op amp (such as the MAX400), generating a VREF output swing. A 16-bit serial word is used to load data into the DAC latch. The 25MHz, 3-wire serial interface is compatible with SPITM/QSPITM/MICROWIRETM, and can interface directly with optocouplers for applications requiring isolation. A power-on reset circuit clears the DAC output to code 0 (MAX5441/MAX5443) or code 32768 (MAX5442 /MAX5444) when power is initially applied. A logic low on CLR asynchronously clears the DAC output to code 0 (MAX5441/MAX5443) or code 32768 (MAX5442/MAX5444) independent of the serial interface. The MAX5441/MAX5443 are available in 8-pin MAX packages. The MAX5442/MAX5444 are available in 10pin MAX packages. o Low 120A Supply Current o Fast 1s Settling Time o 25MHz SPI/QSPI/MICROWIRE-Compatible Serial Interface o VREF Range Extends to VDD o +5V (MAX5441/MAX5442) or +3V (MAX5443/MAX5444) Single-Supply Operation o Full 16-Bit Performance Without Adjustments o Unbuffered Voltage Output Directly Drives 60k Loads o Power-On Reset Circuit Clears DAC Output to Code 0 (MAX5441/MAX5443) or Code 32768 (MAX5442/MAX5444) o Schmitt-Trigger Inputs for Direct Optocoupler Interface o Asynchronous CLR
Features
o Ultra-Small 3mm x 5mm 8-Pin MAX Package
MAX5441-MAX5444
Pin Configurations
TOP VIEW
REF 1 CS 2 8 GND REF 1 CS 2 SCLK 3 6 OUT 5 CLR DIN 4 CLR 5 10 GND 9 VDD
Applications
High-Resolution Offset and Gain Adjustment Industrial Process Control Automated Test Equipment Data-Acquisition Systems
SCLK 3 DIN 4
MAX5441 MAX5443
7 VDD
MAX5442 MAX5444
8 RFB 7 INV 6 OUT
MAX-8
MAX-10
Functional Diagrams appear at end of data sheet.
Ordering Information
PART MAX5441ACUA MAX5441AEUA MAX5441BCUA MAX5441BEUA MAX5442ACUB MAX5442AEUB MAX5442BCUB MAX5442BEUB TEMP RANGE 0C to +70C -40C to +85C 0C to +70C -40C to +85C 0C to +70C -40C to +85C 0C to +70C -40C to +85C PIN-PACKAGE 8 MAX 8 MAX 8 MAX 8 MAX 10 MAX 10 MAX 10 MAX 10 MAX INL (LSB) 2 2 4 4 2 2 4 4 SUPPLY (V) 5 5 5 5 5 5 5 5
SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp.
Ordering Information continued at end of data sheet. 1
________________________________________________________________ Maxim Integrated Products
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+3V/+5V, Serial-Input, Voltage-Output, 16-Bit DACs MAX5441-MAX5444
ABSOLUTE MAXIMUM RATINGS
VDD to GND ..............................................................-0.3V to +6V CS, SCLK, DIN, CLR to GND ...................................-0.3V to +6V REF to GND ................................................-0.3V to (VDD + 0.3V) OUT, INV to GND .....................................................-0.3V to VDD RFB to INV ...................................................................-6V to +6V RFB to GND.................................................................-6V to +6V Maximum Current Into Any Pin ...........................................50mA Continuous Power Dissipation (TA = +70C) 8-Pin MAX (derate 4.5mW/C above +70C)...............362mW 10-Pin MAX (derate 5.6mW/C above +70C) ..............444mW Operating Temperature Ranges MAX544 _ _CU_ ...................................................0C to +70C MAX544 _ _EU_.................................................-40C to +85C Storage Temperature Range .............................-65C to +150C Maximum Die Temperature..............................................+150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +3V (MAX5443/MAX5444) or +5V (MAX5441/MAX5442), VREF = +2.5V, CL = 10pF, GND = 0, RL = , TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER SYMBOL CONDITIONS MIN 16 0.5 0.5 0.5 0.05 10 0.1 ROUT (Note 2) RFB/RINV Ratio error BZSTC PSR +2.7V VDD +3.3V (MAX5443/MAX5444) +4.5V VDD +5.5V (MAX5441/MAX5442) (Note 3) Unipolar mode Bipolar mode 2.0 10 6 15 1 7 0.2 0.5 1 1 VDD 6.2 1 0.015 20 1 2 4 2 TYP MAX UNITS Bits LSB LSB LSB ppm/C LSB ppm/C k % LSB ppm/C LSB STATIC PERFORMANCE--ANALOG SECTION Resolution N Differential Nonlinearity Integral Nonlinearity Zero-Code Offset Error Zero-Code Tempco Gain Error (Note 1) Gain-Error Tempco DAC Output Resistance Bipolar Resistor Matching Bipolar Zero Offset Error Bipolar Zero Tempco Power-Supply Rejection REFERENCE INPUT Reference Input Range Reference Input Resistance (Note 4) DNL INL ZSE ZSTC Guaranteed monotonic MAX544_A MAX544_B
VREF RREF
V k
DYNAMIC PERFORMANCE--ANALOG SECTION Voltage-Output Slew Rate SR (Note 5) Output Settling Time DAC Glitch Impulse Digital Feedthrough To /2LSB of FS Major-carry transition Code = 0000 hex; CS = VDD; SCLK, DIN = 0 to VDD levels
1
V/s s nV-s nV-s
2
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+3V/+5V, Serial-Input, Voltage-Output, 16-Bit DACs
ELECTRICAL CHARACTERISTICS (continued)
PARAMETER Reference -3dB Bandwidth Reference Feedthrough Signal-to-Noise Ratio Reference Input Capacitance SNR CINREF Code = 0000 hex Code = FFFF hex 2.4 0.8 1 (Note 6) 3 0.15 MAX5443/MAX5444 MAX5441/MAX5442 All digital inputs at VDD or GND All digital inputs at VDD or GND MAX5443/MAX5444 MAX5441/MAX5442 2.7 4.5 0.12 0.36 0.60 3.6 5.5 0.20 10 SYMBOL BW
MAX5441-MAX5444
(VDD = +3V (MAX5443/MAX5444) or +5V (MAX5441/MAX5442), VREF = +2.5V, CL = 10pF, GND = 0, RL = , TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) CONDITIONS Code = FFFF hex Code = 0000 hex, VREF = 1VP-P at 100kHz MIN TYP 1 1 92 70 170 MAX UNITS MHz mVP-P dB pF DYNAMIC PERFORMANCE--REFERENCE SECTION
STATIC PERFORMANCE--DIGITAL INPUTS Input High Voltage Input Low Voltage Input Current Input Capacitance Hysteresis Voltage POWER SUPPLY Positive Supply Range (Note 7) Positive Supply Current Power Dissipation VDD IDD PD V mA mW VIH VIL IIN CIN VH V V A pF V
TIMING CHARACTERISTICS
(VDD = +2.7V to +3.3V (MA5443/MAX5444) , VDD = +4.5V to +5.5V (MAX5441/MAX5442), VREF = +2.5V, GND = 0, CMOS inputs, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Figure 1) PARAMETER SCLK Frequency SCLK Pulse Width High SCLK Pulse Width Low CS Low to SCLK High Setup CS High to SCLK High Setup SCLK High to CS Low Hold SCLK High to CS High Hold DIN to SCLK High Setup DIN to SCLK High Hold CLR Pulse Width Low VDD High to CS Low (power-up delay) SYMBOL fCLK tCH tCL tCSS0 tCSS1 tCSH0 tCSH1 tDS tDH tCLW (Note 6) 20 20 15 15 35 20 15 0 20 20 CONDITIONS MIN TYP MAX 25 UNITS MHz ns ns ns ns ns ns ns ns ns s
Note 1: Gain error tested at VREF = +2.0V, +2.5V, and +3.0V (MAX5443/MAX5444) or VREF = +2.0V, +2.5V, +3.0V, and +5.5V (MAX5441/ MAX5442). Note 2: ROUT tolerance is typically 20%. Note 3: Min/max range guaranteed by gain-error test. Operation outside min/max limits will result in degraded performance. Note 4: Reference input resistance is code-dependent, minimum at 8555hex in unipolar mode, 4555hex in bipolar mode. Note 5: Slew-rate value is measured from 10% to 90%. Note 6: Guaranteed by design. Not production tested. Note 7: Guaranteed by power-supply rejection test and Timing Characteristics. _______________________________________________________________________________________ 3
+3V/+5V, Serial-Input, Voltage-Output, 16-Bit DACs MAX5441-MAX5444
__________________________________________Typical Operating Characteristics
(VDD = +3V (MAX5443/MAX5444) or +5V (MAX5441/MAX5442), VREF = +2.5V, GND = 0, RL = , TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.)
SUPPLY CURRENT vs. REFERENCE VOLTAGE
MAX5441/44 toc01
SUPPLY CURRENT vs. TEMPERATURE
0.150 0.125 SUUPLY CURRENT (mA) 0.100 0.075 0.050 0.025 0 -40 -15 10 35 60 85 TEMPERATURE (C) VDD = +5V 0.12 0.11 SUPPLY CURRENT (mA) 0.10 0.09 0.08 0.07 0.06
SUPPLY CURRENT vs. REFERENCE VOLTAGE
MAX5441/44 toc02 MAX5441/44 toc03
0.12 0.11 SUPPLY CURRENT (mA) 0.10 0.09 0.08 0.07 0.06
VDD = +3V
VDD = +5V 0.05 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 REFERENCE VOLTAGE (V) 0.05 0 0.5 1.0 1.5
VDD = +3V 2.0 2.5 3.0
REFERENCE VOLTAGE (V)
ZERO-CODE OFFSET ERROR vs. TEMPERATURE
MAX5441/44 toc04
INTEGRAL NONLINEARITY vs. TEMPERATURE
MAX5441/44 toc05
DIFFERENTIAL NONLINEARITY vs. TEMPERATURE
MAX5441/44 toc06
0.4 0.3 OFFSET ERROR (LSB) 0.2
0.8 0.6 0.4
0.2 0.1 0 DNL (LSB) -0.1 -0.2
+INL
+DNL
INL (LSB)
0.1 0 -0.1 -0.2 -40 -15 10 35 60 85 TEMPERATURE (C)
0.2 0 -INL -0.2 -0.4 -40 -15 10 35 60 85 TEMPERATURE (C)
-DNL -0.3 -0.4 -40 -15 10 35 60 85 TEMPERATURE (C)
GAIN ERROR vs. TEMPERATURE
MAX5441/44 toc07
INTEGRAL NONLINEARITY vs. CODE
MAX5441/44 toc08
DIFFERENTIAL NONLINEARITY
0.100 0.075 0.050 DNL (LSB) 0.025 0 -0.025 -0.050 -0.075 -0.100 -0.125
MAX5441/44 toc09
0 -0.05 GAIN ERROR (LSB) -0.10 -0.15 -0.20 -0.25 -0.30 -40 -15 10 35 60
0.25 0.20 0.15 0.10 INL (LSB) 0.05 0 -0.05 -0.10 -0.15 -0.20 -0.25
0.125
85
0 5k
15k
25k
35k CODE
45k
55k
66k
0 5k
15k
25k
35k CODE
45k
55k
66k
TEMPERATURE (C)
4
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+3V/+5V, Serial-Input, Voltage-Output, 16-Bit DACs
Typical Operating Characteristics (continued)
(VDD = +3V (MAX5443/MAX5444) or +5V (MAX5441/MAX5442), VREF = +2.5V, GND = 0, RL = , TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.)
REFERENCE CURRENT vs. DIGITAL INPUT CODE
MAX5441/44 toc10
MAX5441-MAX5444
FULL-SCALE STEP RESPONSE (FALLING)
MAX5441/44 toc11
FULL-SCALE STEP RESPONSE (RISING)
MAX5441/44 toc12
140 120 REFERENCE CURRENT (A) 100 80 60 40 20
CS 2V/div
CS 2V/div
AOUT 1V/div CL = 20pF CL = 20pF 400ns/div
AOUT 1V/div
0 0 10000 20000 30000 40000 50000 60000 70000 CODE 400ns/div
MAJOR-CARRY GLITCH (RISING)
MAX5441/44 toc13
MAJOR-CARRY GLITCH (FALLING)
MAX5441/44 toc14
CS 1V/div
CS 1V/div
AOUT 20mV/div CL = 20pF 200ns/div
AOUT 20mV/div CL = 20pF 200ns/div
DIGITAL FEEDTHROUGH
MAX5441/44 toc15
INTEGRAL NONLINEARITY vs. REFERENCE VOLTAGE
MAX5441/44 toc16
UNIPOLAR POWER-ON GLITCH (REF = VDD)
MAX5441/44 toc17
0.70 0.65 DIN 2V/div INL (LSB) 0.60 0.55 0.50 AOUT 10mV/div 0.45 0.40
VDD 2V/div
VOUT 10mV/div
CL = 112pF 50ns/div 2.0 2.5 3.0 3.5 4.0 4.5 5.0 50ms/div
REFERENCE VOLTAGE (V)
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+3V/+5V, Serial-Input, Voltage-Output, 16-Bit DACs MAX5441-MAX5444
Pin Description
PIN MAX5441 MAX5443 1 2 3 4 5 6 -- -- 7 8 MAX5442 MAX5444 1 2 3 4 5 6 7 8 9 10 NAME REF CS SCLK DIN CLR OUT INV RFB VDD GND Voltage Reference Input Chip-Select Input Serial Clock Input. Duty cycle must be between 40% and 60%. Serial Data Input Clear Input. Logic low asynchronously clears the DAC to code 0 (MAX5441/MAX5443) or code 32768 (MAX5442/MAX5444). DAC Output Voltage Junction of Internal Scaling Resistors. Connect to external op amp's inverting input in bipolar mode. Feedback Resistor. Connect to external op amp's output in bipolar mode. Supply Voltage. Use +3V for MAX5443/MAX5444 and +5V for MAX5441/MAX5442. Ground FUNCTION
;;;;;;;; ;;;;;;;;;
tCSH1 tLDACS CS tCSHO tCSSO tCH tCL tCSS1 SCLK tDH tDS DIN D15 D14 D0
Figure 1. Timing Diagram
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+3V/+5V, Serial-Input, Voltage-Output, 16-Bit DACs MAX5441-MAX5444
+2.5V MAX6166 +3V/+5V
1F
0.1F 0.1F VDD PCS0 MOSI SCLK (GND) IC1 CS DIN SCLK CLR REF UNIPOLAR OUT
MC68XXXX
MAX5441 MAX5442 MAX5443 MAX5444
GND
MAX495 OUT EXTERNAL OP AMP
Figure 2a. Typical Operating Circuit--Unipolar Output
MAX6166
+2.5V
+3V/+5V
1F
0.1F 0.1F +5V
MC68XXXX
PCS0 MOSI SCLK IC1 (GND) CS DIN
VDD
RFB RINV RFB INV MAX400 OUT BIPOLAR OUT EXTERNAL OP AMP
SCLK CLR
MAX5442 MAX5444
GND
-5V
Figure 2b. Typical Operating Circuit--Bipolar Output
Detailed Description
The MAX5441-MAX5444 voltage-output, 16-bit digitalto-analog converters (DACs) offer full 16-bit performance with less than 2LSB integral linearity error and less than 1LSB differential linearity error, thus ensuring monotonic performance. Serial data transfer minimizes the number of package pins required.
The MAX5441-MAX5444 are composed of two matched DAC sections, with a 12-bit inverted R-2R DAC forming the 12 LSBs and the four MSBs derived from 15 identically matched resistors. This architecture allows the lowest glitch energy to be transferred to the DAC output on major-carry transitions. It also lowers the DAC output impedance by a factor of eight compared
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+3V/+5V, Serial-Input, Voltage-Output, 16-Bit DACs MAX5441-MAX5444
to a standard R-2R ladder, allowing unbuffered operation in medium-load applications. The MAX5442/MAX5444 provide matched bipolar offset resistors, which connect to an external op amp for bipolar output swings (Figure 2b). MAX5442/MAX5444 to code 32768 when VDD is first applied. This ensures that unwanted DAC output voltages will not occur immediately following a system power-up, such as after a loss of power.
Applications Information
Reference and Ground Inputs
The MAX5441-MAX5444 operate with external voltage references from 2V to VDD, and maintain 16-bit performance if certain guidelines are followed when selecting and applying the reference. Ideally, the reference's temperature coefficient should be less than 0.1ppm/C to maintain 16-bit accuracy to within 1LSB over the -40C to +85C extended temperature range. Since this converter is designed as an inverted R-2R voltage-mode DAC, the input resistance seen by the voltage reference is code-dependent. In unipolar mode, the worst-case input-resistance variation is from 11.5k (at code 8555hex) to 200k (at code 0000hex). The maximum change in load current for a 2.5V reference is 2.5V / 11.5k = 217A; therefore, the required load regulation is 7ppm/mA for a maximum error of 0.1LSB. This implies a reference output impedance of less than 18m. In addition, the impedance of the signal path from the voltage reference to the reference input must be kept low because it contributes directly to the load-regulation error. The requirement for a low-impedance voltage reference is met with capacitor bypassing at the reference inputs and ground. A 0.1F ceramic capacitor with short leads between REF and GND provides high-frequency bypassing. A surface-mount ceramic chip capacitor is preferred because it has the lowest inductance. An
Digital Interface
The MAX5441-MAX5444 digital interface is a standard 3-wire connection compatible with SPI/QSPI/ MICROWIRE interfaces. The chip-select input (CS) frames the serial data loading at the data-input pin (DIN). Immediately following CS's high-to-low transition, the data is shifted synchronously and latched into the input register on the rising edge of the serial clock input (SCLK). After 16 data bits have been loaded into the serial input register, it transfers its contents to the DAC latch on CS's low-to-high transition (Figure 3). Note that if CS is not kept low during the entire 16 SCLK cycles, data will be corrupted. In this case, reload the DAC latch with a new 16-bit word.
Clearing the DAC
A 20ns (min) logic-low pulse on CLR asynchronously clears the DAC buffer to code 0 in the MAX5441/ MAX5443 and to code 32768 in the MAX5442/ MAX5444.
External Reference
The MAX5441-MAX5444 operate with external voltage references from 2V to V DD . The reference voltage determines the DAC's full-scale output voltage.
Power-On Reset
The power-on reset circuit sets the output of the MAX5441/MAX5443 to code 0 and the output of the
Figure 3. MAX5441-MAX5444 3-Wire Interface Timing Diagram
; ; ;;
CS DAC UPDATED SCLK SUB-BITS DIN D15 D14 D13 D12 D11 D10 D9 D8 MSB D7 D6 D5 D4 D3 D2 D1 D0 LSB
8
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+3V/+5V, Serial-Input, Voltage-Output, 16-Bit DACs
additional 1F between REF and GND provides low-frequency bypassing. A low-ESR tantalum, film, or organic semiconductor capacitor works well. Leaded capacitors are acceptable because impedance is not as critical at lower frequencies. The circuit can benefit from even larger bypassing capacitors, depending on the stability of the external reference with capacitive loading. add less than 1/2LSB of zero-scale error. The external amplifier's input resistance forms a resistive divider with the DAC output resistance, which results in a gain error. To contribute less than 1/2LSB of gain error, the input resistance typically must be greater than: 6.25k x 217 = 819M The settling time is affected by the buffer input capacitance, the DAC's output capacitance, and PC board capacitance. The typical DAC output voltage settling time is 1s for a full-scale step. Settling time can be significantly less for smaller step changes. Assuming a single time-constant exponential settling response, a full-scale step takes 12 time constants to settle to within 1/2LSB of the final output voltage. The time constant is equal to the DAC output resistance multiplied by the total output capacitance. The DAC output capacitance is typically 10pF. Any additional output capacitance will increase the settling time. The external buffer amplifier's gain-bandwidth product is important because it increases the settling time by adding another time constant to the output response. The effective time constant of two cascaded systems, each with a single time-constant response, is approximately the root square sum of the two time constants. The DAC output's time constant is 1s / 12 = 83ns, ignoring the effect of additional capacitance. If the time constant of an external amplifier with 1MHz bandwidth is 1 / 2 (1MHz) = 159ns, then the effective time constant of the combined system is: 83ns 2 + 159ns 2 = 180ns )( ) ( This suggests that the settling time to within 1/2LSB of the final output voltage, including the external buffer amplifier, will be approximately 12 180ns = 2.15s.
MAX5441-MAX5444
Unbuffered Operation
Unbuffered operation reduces power consumption as well as offset error contributed by the external output buffer. The R-2R DAC output is available directly at OUT, allowing 16-bit performance from +VREF to GND without degradation at zero-scale. The DAC's output impedance is also low enough to drive medium loads (RL > 60k) without degradation of INL or DNL; only the gain error is increased by externally loading the DAC output.
External Output Buffer Amplifier
The requirements on the external output buffer amplifier change whether the DAC is used in the unipolar or bipolar mode of operation. In unipolar mode, the output amplifier is used in a voltage-follower connection. In bipolar mode (MAX5442/MAX5444 only), the amplifier operates with the internal scaling resistors (Figure 2b). In each mode, the DAC's output resistance is constant and is independent of input code; however, the output amplifier's input impedance should still be as high as possible to minimize gain errors. The DAC's output capacitance is also independent of input code, thus simplifying stability requirements on the external amplifier. In bipolar mode, a precision amplifier operating with dual power supplies (such as the MAX400) provides the VREF output range. In single-supply applications, precision amplifiers with input common-mode ranges including GND are available; however, their output swings do not normally include the negative rail (GND) without significant degradation of performance. A single-supply op amp, such as the MAX495, is suitable if the application does not use codes near zero. Since the LSBs for a 16-bit DAC are extremely small (38.15V for VREF = 2.5V), pay close attention to the external amplifier's input specification. The input offset voltage can degrade the zero-scale error and might require an output offset trim to maintain full accuracy if the offset voltage is greater than 1/2LSB. Similarly, the input bias current multiplied by the DAC output resistance (typically 6.25k) contributes to the zero-scale error. Temperature effects also must be taken into consideration. Over the -40C to +85C extended temperature range, the offset voltage temperature coefficient (referenced to +25C) must be less than 0.24V/C to
Digital Inputs and Interface Logic
The digital interface for the 16-bit DAC is based on a 3-wire standard that is compatible with SPI, QSPI, and MICROWIRE interfaces. The three digital inputs (CS, DIN, and SCLK) load the digital input data serially into the DAC. A 20ns (min) logic-low pulse on CLR clears the data in the DAC buffer. All of the digital inputs include Schmitt-trigger buffers to accept slow-transition interfaces. This means that optocouplers can interface directly to the MAX5441- MAX5444 without additional external logic. The digital inputs are compatible with TTL/CMOS-logic levels.
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+3V/+5V, Serial-Input, Voltage-Output, 16-Bit DACs MAX5441-MAX5444
Unipolar Configuration
Figure 2a shows the MAX5441-MAX5444 configured for unipolar operation with an external op amp. The op amp is set for unity gain, and Table 1 lists the codes for this circuit. The bipolar MAX5442/MAX5444 can also be used in unipolar configuration by connecting RFB and INV to REF. This allows the DAC to power-up to midscale.
Table 1. Unipolar Code Table
DAC LATCH CONTENTS MSB LSB 1111 1111 1111 1111 1000 0000 0000 0000 0000 0000 0000 0001 0000 0000 0000 0000 ANALOG OUTPUT, VOUT VREF (65,535 / 65,536) VREF (32,768 / 65,536) = 1/2VREF VREF (1 / 65,536) 0
Bipolar Configuration
Figure 2b shows the MAX5442/MAX5444 configured for bipolar operation with an external op amp. The op amp is set for unity gain with an offset of -1/2VREF. Table 2 lists the offset binary codes for this circuit.
Table 2. Bipolar Code Table
DAC LATCH CONTENTS MSB LSB 1111 1111 1111 1111 1000 0000 0000 0001 1000 0000 0000 0000 0111 1111 1111 1111 0000 0000 0000 0000 ANALOG OUTPUT, VOUT +VREF (32,767 / 32,768) +VREF (1 / 32,768) 0 -VREF (1 / 32,768) -VREF (32,768 / 32,768) = -VREF
Power-Supply Bypassing and Ground Management
Bypass VDD with a 0.1F ceramic capacitor connected between VDD and GND. Mount the capacitor with short leads close to the device (less than 0.25 inches).
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+3V/+5V, Serial-Input, Voltage-Output, 16-Bit DACs
Functional Diagrams
VDD VDD
MAX5441-MAX5444
MAX5441 MAX5443 REF 16-BIT DAC OUT REF
MAX5442 MAX5444 16-BIT DAC
RFB INV OUT
CS SCLK DIN CLR CONTROL LOGIC
16-BIT DATA LATCH
CS SCLK DIN CONTROL LOGIC
16-BIT DATA LATCH
SERIAL INPUT REGISTER
CLR
SERIAL INPUT REGISTER
GND
GND
Ordering Information (continued)
PART MAX5443ACUA MAX5443AEUA MAX5443BCUA MAX5443BEUA MAX5444ACUB MAX5444AEUB MAX5444BCUB MAX5444BEUB TEMP RANGE 0C to +70C -40C to +85C 0C to +70C -40C to +85C 0C to +70C -40C to +85C 0C to +70C -40C to +85C PIN-PACKAGE 8 MAX 8 MAX 8 MAX 8 MAX 10 MAX 10 MAX 10 MAX 10 MAX INL (LSB) 2 2 4 4 2 2 4 4 SUPPLY (V) 3 3 3 3 3 3 3 3
_____________________Chip Information
TRANSISTOR COUNT: 2800 PROCESS: BiCMOS
______________________________________________________________________________________
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+3V/+5V, Serial-Input, Voltage-Output, 16-Bit DACs MAX5441-MAX5444
________________________________________________________Package Information
8LUMAXD.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
10LUMAX.EPS

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